Jump to main content
46.5.5 Level C
Table 46-6. Register Bit Attribute Legend Symbol Description Symbol Description Symbol Description R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented W Writable bit HS Set by Hardware X Bit is unknown at Reset K Write to clear S Software settable bit — —
Name: LEVELC Offset: 0x208 Reset: 0x00000000 Property: R
The LEVELx registers
are read-only registers containing the current level (from 0 to 7) for the 32 tamper
sources.
Bit 31 30 29 28 27 26 25 24 Level 23[3:0] Level 22[3:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 Level 21[3:0] Level 20[3:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 Level 19[3:0] Level 18[3:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 Level 17[3:0] Level 16[3:0] Access R R R R R R R R Reset 0 0 0 0 0 0 0 0
Bits 31:28 – Level 23[3:0] Sets level for Tamper source 23
Bits 27:24 – Level 22[3:0] Sets level for Tamper source 22
Bits 23:20 – Level 21[3:0] Sets level for Tamper source 21
Bits 19:16 – Level 20[3:0] Sets level for Tamper source 20
Bits 15:12 – Level 19[3:0] Sets level for Tamper source 19
Bits 11:8 – Level 18[3:0] Sets level for Tamper source 18
Bits 7:4 – Level 17[3:0] Sets level for Tamper source 17
Bits 3:0 – Level 16[3:0] Sets level for Tamper source 16
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
