19.11.4 Status A REGISTER
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | STATUSA |
| Offset: | 0x104 |
| Reset: | 0x00000000 |
| Property: | R/K |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| BREXT0 | |||||||||
| Access | HS/HC/R/K | ||||||||
| Reset | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| CRSTEXT0 | |||||||||
| Access | HS/HC/R/K | ||||||||
| Reset | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ROMCRC[1:0] | BERR | ||||||||
| Access | HS/HC/R | HS/HC/R | HS/R/K | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bit 16 – BREXT
| Value | Description |
|---|---|
| 1 | Boot ROM Phase Extension for CPUx. Set on Cold-Plugging detection. |
| 0 | Boot ROM Phase Extension released for CPUx. |
Bit 8 – CRSTEXT
| Value | Description |
|---|---|
| 1 | CPUx held in reset extension. Set on Cold-Plugging detection. |
| 0 | CPUx released from reset extension. |
Bits 7:6 – ROMCRC[1:0] Boot ROM CRC Self-Check Status
00 = CRC is in progress.
10 = CRC completed and passed.
01 = CRC completed but failed indicating possible issue with the ROM content. System held in lockup state.
11 = CRC never executed because user disabled CRC check through fuse settings.
| Value | Description |
|---|---|
| 0 | CRC is in progress |
| 2 | CRC completed and passed |
| 1 | CRC completed but failed indicating possible issue with the ROM content. System held in lockup state. |
| 3 | CRC never executed because user disabled CRC check through fuse settings. |
Bit 2 – BERR Bus Error Status
| Value | Description |
|---|---|
| 1 | Bus error incurred while performing the DSU command. |
| 0 | No bus error detected |