4.16.17.13 PMC Main System Bus Clock Register

Name:	PMC_MCR
Offset:	0x0030
Reset:	0x00000000
Property:	Read/Write


Bit	31	30	29	28	27	26	25	24
				EN
Access				R/W
Reset				0


Bit	23	22	21	20	19	18	17	16
				CSS[4:0]
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
						DIV[2:0]
Access						R/W	R/W	R/W
Reset						0	0	0


Bit	7	6	5	4	3	2	1	0
	CMD				ID[3:0]
Access	R/W				R/W	R/W	R/W	R/W
Reset	0				0	0	0	0

Bit 28 – EN Main System Bus Clock Enable

Value	Description
0	The corresponding MCKx is disabled.
1	The corresponding MCKx is enabled.

Bits 20:16 – CSS[4:0] Clock Source Selection

Select the clock to be applied to the selected clock to generate the corresponding MCKx.

Value	Name	Description
0	MD_SLOW_CLK	MD_SLCK is selected.
1	TD_SLOW_CLOCK	TD_SLCK is selected.
2	MAINCK	MAINCK is selected.
3	MCK0	MCK0 is selected.
4	–	Reserved
5	SYSPLL	SYSPLL is selected.
6	DDRPLL	DDRPLL is selected.
7	IMGPLL	IMGPLL is selected.
8	BAUDPLL	BAUDPLL is selected.
9	AUDIOPLL	AUDIOPLL is selected.
10	ETHPLL	ETHPLL is selected.

Bits 10:8 – DIV[2:0] Divisor Value

Select the division ratio to be applied to the selected clock to generate the corresponding MCKx.

Value	Name	Description
0	MASTER_DIV1	Selected clock divided by 1
1	MASTER_DIV2	Selected clock divided by 2
2	MASTER_DIV4	Selected clock divided by 4
3	MASTER_DIV8	Selected clock divided by 8
4	MASTER_DIV16	Selected clock divided by 16
5	MASTER_DIV32	Selected clock divided by 32
6	MASTER_DIV64	Selected clock divided by 64
7	MASTER_DIV3	Selected clock divided by 3

Bit 7 – CMD Command

Value	Description
0	Read mode.
1	Write mode.

Bits 3:0 – ID[3:0] Main System Bus Clock Index

Main System Bus clock index selection from 1 to 4.

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