17.4.14 ITC Enable

The ITC is clocked from ADC 3, and the ITC uses Channel 5 of ADC 3 to convert the analog signal. The ADC 3 input 5, connected to the CVD capacitors array, must be selected in the ADC for the ITC operation. ITC triggers ADC 3 when the Channel 5 trigger source is set to option 12 (ITC). Therefore, to enable ITC, ADC 3 must be initialized first.

The ITC is enabled and can execute CVD scans when the following three bits are set:

  • ON bit = 1 in ITCCON1 register (ITC enable)
  • CVDEN bit = 1 in ITCCON1 register (CVD capacitor array enable)
  • DATASEQ[2:0] bits = 1 in ITCLSxSEQ register (CVD sequence)

When the ON bit is set, the ready bit DRDY in the ITCSTAT register must be polled in software. The DRDY bit is set by hardware when the ITC module is ready for operation.

The example of the ADC 3 initialization and ITC enable code is listed in Example 18-1.

ADC 3 Initialization and ITC Enable Code

 // Initialize ADC 3 for operation with ITC
 AD3CH5CON1bits.MODE = 0;             // single conversion
 AD3CH5CON1bits.IRQSEL = 0;           // each conversion interrupt
 AD3CH5CON1bits.PINSEL = 5;           // AD3AN5 is connected to CVD capacitors array
 AD3CH5CON1bits.NINSEL = 0;           // VSS
 AD3CH5CON1bits.SAMC = 0;             // small balance time
 AD3CH5CON1bits.TRG1SRC = 12          // trigger for ITC
 AD3CONbits.ON = 1;                   // enable ADC 3
 while (AD3ONbits.ADRDY == 0);        // wait for ready
 // Switch on the ITC
 ITCCON1bits.ON = 1; // enable ITC
 while(ITCSTAbits.DRDY == 0);         // wait for ITC ready
 ITCCON1bits.CVDEN = 1;               // enable CVD capacitors array
 ITCLS0SEQ.ACCEN = 1;                 // enable accumulations for List # 0
 ITCLS0SEQ.DATASEQ = 1;               // CVD sequence for List # 0