9.4.6.4 Voltage Monitor Event Status Register

Name:	VM1EVENT
Offset:	0x3B34


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
				OVSRC[3:0]				OVBG
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
				UVSRC[3:0]				UVBG
Access				R/W	R/W	R/W	R/W	R/W
Reset				0	0	0	0	0

Bits 20:17 – OVSRC[3:0] Factory Scan Source OV Event Status bit

Value	Description
1000	VREG4 caused an OV event.
0100	VREG3 caused an OV event.
0010	VREG2 caused an OV event.
0001	V_DDCORE (Buck regulator) caused an OV event.
0000	Factory Scan Source OV event has not occurred.

Bit 16 – OVBG System Bandgap OV Event Status bit

Value	Description
1	Overvoltage event caused by the main system bandgap has occurred.
0	Overvoltage event caused by the main system bandgap has not occurred.

Bits 4:1 – UVSRC[3:0] Factory Scan Source UV Event Status bit

Value	Description
1000	VREG4 caused a UV event.
0100	VREG3 caused a UV event.
0010	VREG2 caused a UV event.
0001	V_DDCORE (Buck regulator) caused a UV event.
0000	Factory Scan Source UV event has not occurred.

Bit 0 – UVBG System Bandgap UV Event Status bit

Value	Description
1	Undervoltage event caused by main system bandgap has occurred.
0	Undervoltage event caused by main system bandgap has not occurred.

DS70005629B

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