16.3.30 ADC 2 Channel n Low Compare Register Legend: n = ADC channel number (0-7); R = Readable bit; W = Writable bit Name: AD2CHnCMPLOOffset: 0x92C, 0x94C, 0x96C, 0x98C, 0x9AC, 0x9CC, 0x9EC, 0xA0CBit 3130292827262524 CMPLO[31:24] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 2322212019181716 CMPLO[23:16] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 15141312111098 CMPLO[15:8] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 76543210 CMPLO[7:0] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bits 31:0 – CMPLO[31:0] Low Threshold Comparator Value bits
Bit 3130292827262524 CMPLO[31:24] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 2322212019181716 CMPLO[23:16] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 15141312111098 CMPLO[15:8] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000 Bit 76543210 CMPLO[7:0] Access R/WR/WR/WR/WR/WR/WR/WR/W Reset 00000000