10.4.10 Bus Error
A bus transaction initiated by the CPU can receive a bus error response.
A bus error on data received in an LD instruction will cause the destination
register to be updated, but the value is UNDEFINED. The BUSERR flag in the Interrupt Flag
(INTFLAGS) register will be set.
A bus error on a fetched instruction will cause the BUSERR flag in the Interrupt Flag (INTFLAGS) register to be set.
The BUSERR flag is routed to the Error Controller.
Note: This corrupted instruction will execute, and data returned in an
LD instruction flagged with bus error will be stored in the register
file, which leads to an undefined state in the CPU and/or the memory system. Because of
this, entering a safe state by executing the associated NMI and/or Error Controller handling
is necessary.