10.4.6 Configuration Change Protection (CCP)

System-critical I/O register settings are protected from accidental modification. Flash self-programming is protected from unexpected execution. This is handled globally by the Configuration Change Protection (CCP) register. An attempted write to a CCP-protected Special Function Register (SFR) outside of a CCP sequence will be discarded and return a bus error response to the bus host attempting the write.

Changes to the protected I/O registers or bits, or execution of protected instructions, are only possible after the CPU writes a signature to the CCP register. The different signatures are listed in the description of the CCP register (CPU.CCP).

Once the correct signature is written by the CPU, interrupts will be ignored for the duration of the configuration change enable period. Any interrupt request (including non-maskable interrupts) during the CCP period will set the corresponding Interrupt flag as ordinary, and the request is kept pending. After finalizing the CCP period, any pending interrupts are executed according to their level and priority.

It is not possible to restart a configuration change period that has not yet completed by writing to the CPU.CCP register. Any writes to this register before the period has ended will be disregarded. The period must either run out or be aborted by any of the operations listed above.

There are two modes of CCP operation: one for protected I/O registers and one for protected self-programming.