10.7.1 Stack Pointer Limit

The Stack Pointer Limit Register (SPLIM) marks the lower limit of the stack. If the Stack Pointer (SP) has a value lower than SPLIM, a limit check signal is asserted, and the Stack Pointer Limit Error (SPLIM) flag in the Interrupt Flags (INTFLAGS) register is set.

The Stack Pointer Limit Error (SPLIM) flag in the Interrupt Flags (INTFLAGS) register is also routed to the Error Controller.

The CPU.SPLIML and CPU.SPLIMH register pair represents the 16-bit value, CPU.SPLIM. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01.

Name: SPLIM
Offset: 0x0
Reset: Top of stack
Property: -

Bit 15141312111098 
 SPLIMH[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset  
Bit 76543210 
 SPLIML[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset  

Bits 15:8 – SPLIMH[15:8] Stack Pointer Limit High Byte

These bits hold the MSB of the 16-bit register. The contents of this register can be locked, preventing it from further updates, by the SPLOCK bit in the Control A (CTRLA) register.

Bits 7:0 – SPLIML[7:0] Stack Pointer Limit Low Byte

These bits hold the LSB of the 16-bit register. The contents of this register can be locked, preventing it from further updates, by the SPLOCK bit in the Control A (CTRLA) register.