27.6.13 Peripheral Multiplexing m

There are up to 16 Peripheral Multiplexing registers in each group, one for every set of two consecutive I/O lines. The n denotes the number of the set of I/O lines.

Note: For the pin with the SWCLK peripheral function, the corresponding PMUX register reset value will reflect that configuration.

Name:	PMUX[m]
Offset:	0x30 + m*0x01 [m=0..15]
Reset:	0x00
Property:	PAC Write-Protection


Bit	7	6	5	4	3	2	1	0
	PMUXO[3:0]				PMUXE[3:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:4 – PMUXO[3:0] Peripheral Multiplexing for Odd-Numbered Pin

These bits select the peripheral function for odd-numbered pins (2*n + 1) of a PORT group when the corresponding PINCFG[n].PMUXEN bit is ‘1’.

Not all possible values for this selection may be valid. For additional information, refer to the Pinout section.

Value	Name	Description
0x00	A	Peripheral function A selected
0x01	B	Peripheral function B selected
0x02	C	Peripheral function C selected
0x03	D	Peripheral function D selected
0x04	E	Peripheral function E selected
0x05	F	Peripheral function F selected
0x06	G	Peripheral function G selected
0x07	H	Peripheral function H selected
0x08	I	Peripheral function I selected
0x09	J	Peripheral function J selected
Other	—	Reserved

Bits 3:0 – PMUXE[3:0] Peripheral Multiplexing for Even-Numbered Pin

These bits select the peripheral function for even-numbered pins (2*n) of a PORT group when the corresponding PINCFG[n].PMUXEN bit is ‘1’.

Not all possible values for this selection may be valid. For additional information, refer to the Pinout section.

Value	Name	Description
0x00	A	Peripheral function A selected
0x01	B	Peripheral function B selected
0x02	C	Peripheral function C selected
0x03	D	Peripheral function D selected
0x04	E	Peripheral function E selected
0x05	F	Peripheral function F selected
0x06	G	Peripheral function G selected
0x07	H	Peripheral function H selected
0x08	I	Peripheral function I selected
0x09	J	Peripheral function J selected
Other	—	Reserved