27.6.7 Data Output Value Set

This register allows the user to set the high drive level for one or more output I/O pins, without performing a Read-Modify-Write (RMW) operation on the Data Output Value register (OUT). Changes in this register will be reflected in the OUT, Data Output Value Toggle (OUTTGL), and Data Output Value Clear (OUTCLR) registers.

Name:	OUTSET
Offset:	0x18
Reset:	0x00000000
Property:	PAC Write-Protection


Bit	31	30	29	28	27	26	25	24
	OUT31SET	OUT30SET	OUT29SET	OUT28SET	OUT27SET	OUT26SET	OUT25SET	OUT24SET
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	OUT23SET	OUT22SET	OUT21SET	OUT20SET	OUT19SET	OUT18SET	OUT17SET	OUT16SET
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	OUT15SET	OUT14SET	OUT13SET	OUT12SET	OUT11SET	OUT10SET	OUT9SET	OUT8SET
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	OUT7SET	OUT6SET	OUT5SET	OUT4SET	OUT3SET	OUT2SET	OUT1SET	OUT0SET
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – OUTnSET PORT Data Output Value n Set

Writing a ‘0’ to a bit has no effect.

Writing a ‘1’ to a bit will set the corresponding bit in the OUT register.

Value	Description
0	The pin in the PORT group corresponding to this bit is driven low
1	The pin in the PORT group corresponding to this bit is driven high, or the input is connected to an internal pull-up