27.6.10 Control
| Name: | CTRL |
| Offset: | 0x24 |
| Reset: | 0x00000000 |
| Property: | PAC Write-Protection |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| SAMPLING31 | SAMPLING30 | SAMPLING29 | SAMPLING28 | SAMPLING27 | SAMPLING26 | SAMPLING25 | SAMPLING24 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| SAMPLING23 | SAMPLING22 | SAMPLING21 | SAMPLING20 | SAMPLING19 | SAMPLING18 | SAMPLING17 | SAMPLING16 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| SAMPLING15 | SAMPLING14 | SAMPLING13 | SAMPLING12 | SAMPLING11 | SAMPLING10 | SAMPLING9 | SAMPLING8 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| SAMPLING7 | SAMPLING6 | SAMPLING5 | SAMPLING4 | SAMPLING3 | SAMPLING2 | SAMPLING1 | SAMPLING0 | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – SAMPLINGn Input Sampling Mode n
These bits control the input sampling functionality of the I/O pin input samplers, for pins configured as inputs through the Data Direction register (DIR).
The input samplers are enabled and disabled in subgroups of eight pins. Therefore, if any pin within a byte requests continuous sampling, all pins in that eight-pin subgroup will be continuously sampled.
| Value | Description |
|---|---|
| 0 | On-demand sampling is enabled for the eight I/O pins in the PORT group corresponding to the byte location of this bit |
| 1 | Continuous sampling is enabled for the eight I/O pins in the PORT group corresponding to the byte location of this bit |
