70.7.22 TCPC Control Register
Name: | TCPC_CR |
Offset: | 0x80 |
Reset: | – |
Property: | Write-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
WAKEY[23:16] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
WAKEY[15:8] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
WAKEY[7:0] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
SWRST | |||||||||
Access | W | ||||||||
Reset | – |
Bits 31:8 – WAKEY[23:0] Register Write Access Key
Value | Name | Description |
---|---|---|
0x544343 | PASSWD | Writing any other value in this field aborts the write operation. |
Bit 0 – SWRST Software Reset
Value | Description |
---|---|
0 | No effect. |
1 | Resets the TCPC. A software-triggered hardware reset of the TCPC interface is performed. |