70.7.23 TCPC Set Status Register
Name: | TCPC_SSR |
Offset: | 0x84 |
Reset: | – |
Property: | Write-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
FAULT_STATUS[7:0] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
POWER_STATUS[7:0] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
CC_STATUS[7:0] | |||||||||
Access | W | W | W | W | W | W | W | W | |
Reset | – | – | – | – | – | – | – | – |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
Access | |||||||||
Reset |
Bits 31:24 – FAULT_STATUS[7:0] Fault Status Register Set
Value | Description |
---|---|
0 | No effect. |
1 | Sets the corresponding bit in TCPC_FS and the FLT_ST bit in TCPC_AL. |
Bits 23:16 – POWER_STATUS[7:0] Power Status Register Set
Value | Description |
---|---|
0 | No effect. |
1 | Sets the corresponding bit in TCPC_PS and the PWR_ST bit in TCPC_AL. |
Bits 15:8 – CC_STATUS[7:0] CC Status Register Set
Value | Description |
---|---|
0 | No effect. |
1 | Sets the corresponding bit in TCPC_CCS and the CC_ST bit in TCPC_AL. |