19.4.1.8.5 SPI Client Mode and Frame Host Mode

This Framed SPI mode is enabled by setting the MSTEN bit (SPIxCON1[5]) to ‘0’, the FRMEN bit (SPIxCON1[23]) to ‘1’ and the FRMSYNC bit (SPIxCON1[22]) to ‘0’. The input SPI clock will be continuous in Client mode. The SSx pin will be an output when bit, FRMSYNC, is low. Therefore, when SPIxBUF is written, the module will drive the SSx pin active-high or active-low, depending on the FRMPOL bit (SPIxCON1[21]), on the next transmit edge of the SPI clock. The SSx pin will be driven high for one SPI clock cycle. Data transmission will start on the next SPI clock transmit edge. A connection diagram indicating signal directions for this operating mode is shown in Figure 19-16.

Note:

1. In Framed SPI modes, the SSx pin is used to transmit/receive the Frame Synchronization pulse.
2. Framed SPI modes require the use of all four pins (i.e., using the SSx pin is not optional).