20.5.4.3.8 General Call Operation

The addressing procedure for the I²C bus is such that the first byte after a Start condition usually determines which client device the host is addressing. The exception is the general call address, which can address all devices. When this address is used, all the enabled devices respond with an Acknowledge. The general call address is one of the eight addresses reserved for specific purposes by the I²C protocol. It consists of all ‘0’s with R/W = 0. The general call is always a client write operation.

The general call address is recognized when the General Call Enable bit, GCEN (I2CxCON1[7], is set, as illustrated in Figure 20-30. Following a Start bit detect, eight bits are shifted into the I2CxRSR register, and the address is compared against the I2CxADD register and the general call address.

If the general call address matches, the following events occur:

• An ACK is generated
• The client will set the GCSTAT status bit (I2CxSTAT1[9])
• The D/A and R/W status bits are cleared
• The module generates the I2CxIF interrupt on the falling edge of the ninth SCLx clock if the CADDRIE (I2CxINTC[10]) bit and CSTIE(I2CxINTC[12]) are enabled
• The I2CxRSR register is transferred to the I2CxRCV register and the RBF status bit (I2CxSTAT[1]) is set (during the eighth bit)
• The module waits for the host to send data

When the interrupt is serviced, the cause for the interrupt can be checked by reading the contents of the GCSTAT status bit to determine if the device address was device-specific or a general call address.