13.4.10.3 DMA ECC Mode

ECC (Error Correction Code) mode in the DMA controller ensures data integrity by detecting and correcting single-bit errors and reporting double-bit errors during memory transfers. The DMA works alongside the BMX ECC check to enhance this feature. After enabling ECC by setting BMXECCXCONbits.ON = 1, error detection is activated. The ESEL (Error Reporting Select) bit configures the reporting of errors based on Single Error Correction (SEC) and Double Error Detection (DED). Single-bit errors are automatically corrected and logged in the BMXECCXSTATbits.SEC register, while double-bit errors are reported in the BMXECCXSTATbits.DED.

Refer to Error Correcting Code (ECC) for additional Fault injection information.