38.13.8 CxTXIF

CAN Transmit Interrupt Status Register

Note:

The individual bytes in this multibyte register can be accessed with the following register names:
- CxTXIFT: Accesses the top byte TXIF[31:24]
- CxTXIFU: Accesses the upper byte TXIF[23:16]
- CxTXIFH: Accesses the high byte TXIF[15:8]
- CxTXIFL: Accesses the low byte TXIF[7:0]
TFIFx is the ‘or’ of all enabled TX FIFO flags (individual flags need to be cleared in the FIFO register).

Name:	CxTXIF
Offset:	0x0124


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16

Access
Reset


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
					TFIF[3:0]
Access					R	R	R	R
Reset					0	0	0	0

Bits 3:0 – TFIF[3:0] Transmit FIFO/TXQ Interrupt Pending

Value	Description
1	One or more enabled transmit FIFO/TXQ interrupts are pending for the respective FIFO/TXQ
0	No enabled transmit FIFO/TXQ interrupts for the respective FIFO/TXQ are pending

The individual bytes in this multibyte register can be accessed with the following register names: CxTXIFT: Accesses the top byte TXIF[31:24] CxTXIFU: Accesses the upper byte TXIF[23:16] CxTXIFH: Accesses the high byte TXIF[15:8] CxTXIFL: Accesses the low byte TXIF[7:0] TFIFx is the ‘or’ of all enabled TX FIFO flags (individual flags need to be cleared in the FIFO register).