11.13.34 Peripheral Interrupt Priority Register 3

Name:	IPR3
Offset:	0x4A1


Bit	7	6	5	4	3	2	1	0
	DMA2AIP	DMA2ORIP	DMA2DCNTIP	DMA2SCNTIP	DMA1AIP	DMA1ORIP	DMA1DCNTIP	DMA1SCNTIP
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	1	1	1	1	1	1	1	1

Bit 7 – DMA2AIP DMA2 Abort Interrupt Priority

Value	Description
1	High Priority
0	Low Priority

Bit 6 – DMA2ORIP DMA2 Overrun Interrupt Priority

Value	Description
1	High Priority
0	Low Priority

Bit 5 – DMA2DCNTIP DMA2 Destination Count Interrupt Priority

Value	Description
1	High Priority
0	Low Priority

Bit 4 – DMA2SCNTIP DMA2 Source Count Interrupt Priority

Value	Description
1	High Priority
0	Low Priority

Bit 3 – DMA1AIP DMA1 Abort Interrupt Priority

Value	Description
1	High Priority
0	Low Priority

Bit 2 – DMA1ORIP DMA1 Overrun Interrupt Priority

Value	Description
1	High Priority
0	Low Priority

Bit 1 – DMA1DCNTIP DMA1 Destination Count Interrupt Priority

Value	Description
1	High Priority
0	Low Priority

Bit 0 – DMA1SCNTIP DMA1 Source Count Interrupt Priority

Value	Description
1	High Priority
0	Low Priority

DS40002671A

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