11.13.35 Peripheral Interrupt Priority Register 4

Name: IPR4
Offset: 0x4A2

Bit 76543210 
 DMA4AIPDMA4ORIPDMA4DCNTIPDMA4SCNTIPDMA3AIPDMA3ORIPDMA3DCNTIPDMA3SCNTIP 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 11111111 

Bit 7 – DMA4AIP DMA4 Abort Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 6 – DMA4ORIP DMA Overrun Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 5 – DMA4DCNTIP DMA4 Destination Count Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 4 – DMA4SCNTIP DMA4 Source Count Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 3 – DMA3AIP DMA3 Abort Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 2 – DMA3ORIP DMA3 Overrun Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 1 – DMA3DCNTIP DMA3 Destination Count Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority

Bit 0 – DMA3SCNTIP DMA3 Source Count Interrupt Priority

ValueDescription
1 High Priority
0 Low Priority