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11.13.33 Peripheral Interrupt
Priority Register 2
Bit 7 6 5 4 3 2 1 0 CLC8IP CLC7IP CLC6IP CLC5IP CLC4IP CLC3IP CLC2IP CLC1IP Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 1 1 1 1 1 1 1 1
Bit 7 – CLC8IP CLC8 Interrupt Priority
Value Description
1
High Priority
0
Low Priority
Bit 6 – CLC7IP CLC7 Interrupt Priority
Value Description
1
High Priority
0
Low Priority
Bit 5 – CLC6IP CLC6 Interrupt Priority
Value Description
1
High Priority
0
Low Priority
Bit 4 – CLC5IP CLC5 Interrupt Priority
Value Description
1
High Priority
0
Low Priority
Bit 3 – CLC4IP CLC4 Interrupt Priority
Value Description
1
High Priority
0
Low Priority
Bit 2 – CLC3IP CLC3 Interrupt Priority
Value Description
1
High Priority
0
Low Priority
Bit 1 – CLC2IP CLC2 Interrupt
Priority
Value Description
1
High Priority
0
Low Priority
Bit 0 – CLC1IP CLC1 Interrupt
Priority
Value Description
1
High
Priority
0
Low
Priority
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