11.13.28 Peripheral Interrupt Request Register 9

Note:

Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit. User software must ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.

Name:	PIR9
Offset:	0x4BF


Bit	7	6	5	4	3	2	1	0
							CM2IF	CM1IF
Access							R/W/HS	R/W/HS
Reset							0	0

Bit 1 – CM2IF CMP2 Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Bit 0 – CM1IF CMP1 Interrupt Flag

Value	Description
1	Interrupt has occurred (must be cleared by software)
0	Interrupt event has not occurred

Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit. User software must ensure the appropriate interrupt flag bits are clear prior to enabling an interrupt.