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11.13.9 Peripheral Interrupt Enable
Register 2
Bit 7 6 5 4 3 2 1 0 CLC8IE CLC7IE CLC6IE CLC5IE CLC4IE CLC3IE CLC2IE CLC1IE Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 7 – CLC8IE CLC8 Interrupt Enable
Value Description
1
Enabled
0
Disabled
Bit 6 – CLC7IE CLC7 Interrupt Enable
Value Description
1
Enabled
0
Disabled
Bit 5 – CLC6IE CLC6 Interrupt Enable
Value Description
1
Enabled
0
Disabled
Bit 4 – CLC5IE CLC5 Interrupt Enable
Value Description
1
Enabled
0
Disabled
Bit 3 – CLC4IE CLC4 Interrupt Enable
Value Description
1
Enabled
0
Disabled
Bit 2 – CLC3IE CLC3 Interrupt Enable
Value Description
1
Enabled
0
Disabled
Bit 1 – CLC2IE CLC2 Interrupt
Enable
Value Description
1
Enabled
0
Disabled
Bit 0 – CLC1IE CLC1 Interrupt
Enable
Value Description
1
Enabled
0
Disabled
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