24 APB Configuration Interface

The SERDES interface (SERDESIF), fabric DDR system (FDDR), and microcontroller subsystem double data rate (MDDR) controller has to be initialized properly during bootup. Each of these subsystems contains a large number of internal registers for initialization and run-time operation. These registers are accessed through a dedicated peripheral initialization bus often called APB configuration bus. The APB configuration interface is compliant with AMBA APB3 protocol specification.