18 System Timer

The SmartFusion 2 system timer (hereinafter referred as timer) consists of two programmable 32-bit decrementing counters that generate interrupts to the Cortex-M3 processor and FPGA fabric. The two 32-bit timers are identical. X is used as a placeholder for 1, 2, or 64 in register descriptions. It indicates Timer 1, Timer 2, or Timer 64.