1 Cortex-M3 Processor Overview and Debug Features

The Arm® Cortex®-M3 processor is a low power consumption processor that features low gate count, low interrupt latency, and low-cost debug. It is intended for deeply embedded applications that require optimal interrupt response features. This processor implements the Arm v7-M architecture and is shown in Figure 1-1. The SmartFusion® 2 SoC FPGA device uses the R2P1 version of the Cortex-M3 core. This chapter highlights the Cortex-M3 processor and debug subsystem customizations made specific to SmartFusion 2.

For more details on the internals like programming model, exception model, instruction set, the 
Cortex-M3 specific peripherals such as SysTick timer, memory protection unit, and others, refer to the 2 Cortex-M3 Processor (Reference Material). The following manuals are available at the ARM Info center:

• Cortex-M3 Technical Reference Manual
• ARM v7-M Architecture Reference Manual
• ARM v7-M Architecture Application Level Reference Manual

The Definitive Guide to the Arm Cortex-M3 by Joseph Yiu is recommended as additional reading (ISBN: 978-0-7506-8534-4).