32.6.21 Event User Security Attribution Check
Important: This
register is only available for PIC32CM LS00/LS60
and has no effect for PIC32CM LE00.
Name: | NSCHKUSER0 |
Offset: | 0x1F0 |
Reset: | 0x00000000 |
Property: | PAC Write-Protection |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
USER31 | USER30 | USER29 | USER28 | USER27 | USER26 | USER25 | USER24 | ||
Access | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
USER23 | USER22 | USER21 | USER20 | USER19 | USER18 | USER17 | USER16 | ||
Access | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
USER15 | USER14 | USER13 | USER12 | USER11 | USER10 | USER9 | USER8 | ||
Access | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
USER7 | USER6 | USER5 | USER4 | USER3 | USER2 | USER1 | USER0 | ||
Access | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | RW/RW/RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31 – USER Event User n Selection [n=0..31]
These bits selects the individual event users for security attribution check. If any event user selected in NSCHKUSER has the corresponding bit in NONSECUSER set to the opposite value, then the NSCHK interrupt flag will be set.
Value | Description |
---|---|
0 | 0-to-1 transition will be detected on corresponding NONSECUSER bit. |
1 | 1-to-0 transition will be detected on corresponding NONSECUSER bit. |