32.8.21 ADACT
| Name: | ADACT |
| Address: | 0x117 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| ACT[4:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bits 4:0 – ACT[4:0] Auto-Conversion Trigger Select Bits
| ACT | Auto-conversion Trigger Source |
|---|---|
11111 |
Software write to ADPCH |
11110 |
Reserved, do not use |
11101 |
Software read of ADRESH |
11100 |
Software read of ADERRH |
11011 to 11010 |
Reserved, do not use |
11001 |
SMT2_trigger |
11000 |
CCP5_trigger |
10111 |
CLC4_out |
10110 |
CLC3_out |
10101 |
CLC2_out |
10100 |
CLC1_out |
10011 |
Logical OR of all
Interrupt-on-change Interrupt Flags |
10010 |
C2_out |
10001 |
C1_out |
10000 |
NCO1_out |
01111 |
PWM7_out |
01110 |
PWM6_out |
01101 |
CCP4_trigger |
01100 |
CCP3_trigger |
01011 |
CCP2_trigger |
01010 |
CCP1_trigger |
01001 |
SMT1_trigger |
01000 |
TMR6_postscaled |
00111 |
TMR5_overflow |
00110 |
TMR4_postscaled |
00101 |
TMR3_overflow |
00100 |
TMR2_postscaled |
00011 |
TMR1_overflow |
00010 |
TMR0_overflow |
00001 |
Pin selected by ADACTPPS |
00000 |
External Trigger Disabled |