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Libero IDE v9.x
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5
Libero IDE
5.22
Bus Interfaces
5.22.10
DirectCore Bus Interfaces
5.22.10.4
DBGInterface
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1
FlashROM, Analog System Builder, and Flash Memory System Builder
2
Analog System Builder, FlashROM and Flash Memory System Builder
3
ChipEditor
4
Designer Documentation Catalog
5
Libero IDE
5.1
What's New in Libero IDE v9.1
5.2
Supported Families
5.3
Project Management
5.4
Project Files
5.5
Project Options
5.6
Settings
5.7
Preferences
5.8
Project Manager Interface
5.9
Designing with Designer Block Components
5.10
Creating a Designer Block Component in Libero IDE
5.11
Creating a Designer Block Component in Designer
5.12
Instantiating a Designer Block Component in Designer
5.13
SmartDesign
5.14
Getting Started with SmartDesign
5.15
SmartDesign User Interface
5.16
Canvas View
5.17
Grid
5.18
Instance-Instance View
5.19
Schematic View
5.20
Creating a SmartDesign
5.21
Connecting Instances
5.22
Bus Interfaces
5.22.1
About Bus Interfaces
5.22.2
Using Bus Interfaces in SmartDesign
5.22.3
Adding Bus Interfaces to SmartDesign Components
5.22.4
Adding Bus Interfaces to SmartDesign Instances
5.22.5
Removing Bus Interfaces from Instances
5.22.6
Viewing Bus Interface Properties
5.22.7
Modifying Bus Interface Details
5.22.8
Finding Compatible Bus Interfaces
5.22.9
Microchip Bus Interfaces
5.22.10
DirectCore Bus Interfaces
5.22.10.1
AHB
5.22.10.2
APB
5.22.10.3
SysInterface
5.22.10.4
DBGInterface
5.22.10.5
CPInterface
5.22.11
Exposing Bus Interface Pins
5.22.12
Default Tie-offs with Bus Interfaces
5.22.13
Tying Off (Disabling) Unused Bus Interfaces
5.22.14
Required vs. Optional Bus Interfaces
5.22.15
Promoting Bus Interfaces to Top-level
5.23
Incremental Design
5.24
Reference
5.25
Welcome to Designer
5.26
Device Selection
5.27
Design Constraints
5.28
Families Supported
5.29
Entering Constraints
5.30
Running Layout
5.31
Device Programming
5.32
Generating Programming Files
5.33
TCL Command Reference
5.34
Project Manager Tcl Commands
5.35
Reference
5.36
Dialog Boxes
5.37
Revision History
5
Microchip FPGA Support
5
Microchip Information
6
Design Constraints for Software
7
Innoveda eProduct Designer Interface Guide - UNIX
8
Innoveda eProduct Designer Interface Guide – Windows
9
FlashPro for Software
10
SmartGen Cores Reference
11
HDL Coding Style
12
Libero IDE Documentation Catalog
13
Libero IDE
14
Antifuse Macro Library Guide for Software
15
MultiView Navigator
16
NetlistViewer (non-MVN)
17
IGLOO, ProASIC3, SmartFusion and Fusion Macro Library for Software
18
ProASIC and ProASIC PLUS Macro Library for Software
19
PinEditor (non-MVN)
20
SmartPower
21
SmartTime
22
Timer
23
VHDL Vital Simulation
24
Verilog Simulation
25
Technical Support
26
About Microchip
5.22.10.4 DBGInterface
This is the set of debug ports on the CoreMP7 core.
Rev: A
