14.15.3 Verilog Source File

Like the Constants in VHDL, Verilog library has two definitions:

`define AX_FF_INIT_VALUE 1'b0

`define POWERUP_TIME 100

AX_FF_INIT_VALUE defines the required power up state. POWERUP_TIME defines for how long GCLR and GPSET should be applied. You can modify these definitions as required and compile the library. Settings for power up states 0/1 are listed as follws.

POWER UP STATE = 1

Set the definition as:

`define AX_FF_INIT_VALUE 1

POWER UP STATE = 0

Set the definition as:

`define AX_FF_INIT_VALUE 0