22.12.7 Adding and Removing Break Paths

Asynchronous feedback paths in a design can cause paths to be reported as having excessive delays. The most common example is feedback paths through asynchronous Set or Reset pins to banks of flip-flops, like a state machine or a counter.

To exclude paths:

1. From the File menu, choose Preferences. The Preferences dialog box appears
2. Break Paths at Register. Choose Clk/G Pins, Clr/Pre Pins (Async) or Data Pins of Latches to prevent displaying paths that pass through either clock, gated, clear, preset, or data pins of flip-flops or latches.
   Note: The Break Paths at Register option is selected by default, and the paths are excluded. Clear the check boxes in the Timer Preferences menu to display these paths.
3. Click OK.