38.13.18 CxTEFSTA
Note:
- The individual bytes in this
multibyte register can be accessed with the following register names:
- CxTEFSTAT: Accesses the top byte TEFSTA[31:24]
- CxTEFSTAU: Accesses the upper byte TEFSTA[23:16]
- CxTEFSTAH: Accesses the high byte TEFSTA[15:8]
- CxTEFSTAL: Accesses the low byte TEFSTA[7:0]
- These bits are read-only and reflect the status of the FIFO.
Name: | CxTEFSTA |
Offset: | 0x0144 |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
Access | |||||||||
Reset |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
TEFOVIF | TEFFIF | TEFHIF | TEFNEIF | ||||||
Access | HS/C | R | R | R | |||||
Reset | 0 | 0 | 0 | 0 |
Bit 3 – TEFOVIF Transmit Event FIFO Overflow Interrupt Flag
Value | Description |
---|---|
1 | Overflow event has occurred |
0 | No overflow event has occurred |
Bit 2 – TEFFIF Transmit Event FIFO Full Interrupt Flag(2)
Value | Description |
---|---|
1 | FIFO is full |
0 | FIFO is not full |
Bit 1 – TEFHIF Transmit Event FIFO Half Full Interrupt Flag(2)
Value | Description |
---|---|
1 | FIFO is greater than or equal to half full |
0 | FIFO is less than half full |
Bit 0 – TEFNEIF Transmit Event FIFO Not Empty Interrupt Flag(2)
Value | Description |
---|---|
1 | FIFO is not empty |
0 | FIFO is empty |