1 Device Overview
- This data sheet summarizes the features of the dsPIC33CK512MPT608 family of devices. It is not intended to be a comprehensive resource. To complement the information in this data sheet, refer to the related section of the “dsPIC33/PIC24 Family Reference Manual”, which is available from the Microchip website (www.microchip.com)
- Some registers and associated bits described in this section may not be available on all devices. Refer to Memory Organization in this data sheet for device-specific register and bit information.
This document contains device-specific information for the dsPIC33CK512MPT608 Digital Signal Controller (DSC) devices.
dsPIC33CK512MPT608 devices contain extensive Digital Signal Processor (DSP) functionality with a high-performance MCU architecture.
Figure 1-1 shows a general block diagram of the core and peripheral modules of the dsPIC33CK512MPT608 family.
- The numbers in the parentheses are the number of instantiations of the module indicated.
- Not all I/O pins or features are implemented on all device pinout configurations. See Table 1-1 for specific implementations by pin count.
- Some peripheral I/Os are only accessible through Peripheral Pin Select (PPS).
Pin Name(1) | Pin Type | Buffer Type | PPS | Description |
---|---|---|---|---|
AN0-AN23, AN26, AN27 ANA0-ANA3 ANB0-ANB3 ANC0-ANC2 ANN0-ANN4 |
I I I I I |
Analog Analog Analog Analog Analog |
No No No No No |
Analog input channels Analog alternate inputs Analog alternate “B” inputs Analog alternate “C” inputs Analog negative inputs |
ADTRG31 | I | ST | Yes | ADC Trigger Input 31 |
CAN1RX CAN1 CAN2RX CAN2 |
I O I O |
ST — ST — |
Yes Yes Yes Yes |
CAN1 receive input CAN1 transmit output CAN2 receive input CAN2 transmit output |
CLKI CLKO |
I O |
ST/CMOS — |
No No |
External Clock (EC) source input. Always associated with OSCI pin function. Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. Optionally functions as CLKO in RC and EC modes. Always associated with OSCO pin function. |
OSCI OSCO |
I I/O |
ST/CMOS — |
No No |
Oscillator crystal input. ST buffer when configured in RC mode; CMOS otherwise. Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode. Optionally functions as CLKO in RC and EC modes. |
REFOI | I | ST | Yes | Reference clock input |
REFCLKO | O | — | Yes | Reference clock output |
INT0 INT1 INT2 INT3 |
I I I I |
ST ST ST ST |
No Yes Yes Yes |
External Interrupt 0 External Interrupt 1 External Interrupt 2 External Interrupt 3 |
IOCA[4:0] IOCB[15:0] IOCC[15:12], IOCC[9:6], IOCC[3:0] IOCD[15:5], IOCD[2:0] IOCE[15:14], IOCE[12:0] |
I I I I I |
ST ST ST ST ST |
No No No No No |
Interrupt-on-Change input for PORTA Interrupt-on-Change input for PORTB Interrupt-on-Change input for PORTC Interrupt-on-Change input for PORTD Interrupt-on-Change input for PORTE |
QEIA1 QEIB1 QEINDX1 QEIHOM1 QEICMP |
I I I I O |
ST ST ST ST — |
Yes Yes Yes Yes Yes |
QEI Input A1 QEI Input B1 QEI Index 1 input QEI Home 1 input QEI comparator output |
QEIA2 QEIB2 QEINDX2 QEIHOM2 QEICMP |
I I I I O |
ST ST ST ST — |
Yes Yes Yes Yes Yes |
QEI Input A2 QEI Input B2 QEI Index 2 input QEI Home 2 input QEI comparator output |
QEIA3 QEIB3 QEINDX3 QEIHOM3 QEICMP |
I I I I O |
ST ST ST ST — |
Yes Yes Yes Yes Yes |
QEI Input A3 QEI Input B3 QEI Index 3 input QEI Home 3 input QEI comparator output |
RA0-RA4 | I/O | ST | No | PORTA is a bidirectional I/O port |
RB0-RB15 | I/O | ST | No | PORTB is a bidirectional I/O port |
RC0-RC3, RC6-RC9, RC12-RC15 | I/O | ST | No | PORTC is a bidirectional I/O port |
RD0-RD2, RD5-RD15 | I/O | ST | No | PORTD is a bidirectional I/O port |
RE0-RE11, RE14-RE15 | I/O | ST | No | PORTE is a bidirectional I/O port |
T1CK | I | ST | Yes | Timer1 external clock input |
U1CTS U1RTS U1RX U1TX U1DSR U1DTR |
I O I O I O |
ST — ST — ST — |
Yes Yes Yes Yes Yes Yes |
UART1 Clear-to-Send UART1 Request-to-Send UART1 receive UART1 transmit UART1 Data-Set-Ready UART1 Data-Terminal-Ready |
U2CTS U2RTS U2RX U2TX U2DSR U2DTR |
I O I O I O |
ST — ST — ST — |
Yes Yes Yes Yes Yes Yes |
UART2 Clear-to-Send UART2 Request-to-Send UART2 receive UART2 transmit UART2 Data-Set-Ready UART2 Data-Terminal-Ready |
U3CTS U3RTS U3RX U3TX U3DSR U3DTR |
I O I O I O |
ST — ST — ST — |
Yes Yes Yes Yes Yes Yes |
UART3 Clear-to-Send UART3 Request-to-Send UART3 receive UART3 transmit UART3 Data-Set-Ready UART3 Data-Terminal-Ready |
SENT1 SENT2 SENT1OUT SENT2OUT |
I I O O |
ST ST — — |
Yes Yes Yes Yes |
SENT1 input SENT2 input SENT1 output SENT2 output |
PTGTRG24 PTGTRG25 |
O O |
— — |
Yes Yes |
PTG Trigger Output 24 PTG Trigger Output 25 |
TCKI1-TCKI9 ICM1-ICM9 OCFA-OCFD OCM1-OCM9 |
I I I O |
ST ST — — |
Yes Yes Yes Yes |
SCCP/MCCP Timer Inputs 1 through 9 SCCP/MCCP Capture Inputs 1 through 9 SCCP/MCCP Fault Inputs A through D SCCP/MCCP Compare Outputs 1 through 9 |
SCK1 SDI1 SDO1 SS1 |
I/O I O I/O |
ST ST — ST |
Yes Yes Yes Yes |
Synchronous serial clock I/O for SPI1 SPI1 data in SPI1 data out SPI1 Client synchronization or frame pulse I/O |
SCK2 SDI2 SDO2 SS2 |
I/O I O I/O |
ST ST — ST |
Yes Yes Yes Yes |
Synchronous serial clock I/O for SPI2 SPI2 data in SPI2 data out SPI2 Client synchronization or frame pulse I/O |
SCK3 SDI3 SDO3 SS3 |
I/O I O I/O |
ST ST — ST |
Yes Yes Yes Yes |
Synchronous serial clock I/O for SPI3 SPI3 data in SPI3 data out SPI3 Client synchronization or frame pulse I/O |
SCL1 SDA1 ASCL1 ASDA1 |
I/O I/O I/O I/O |
ST ST ST ST |
No No No No |
Synchronous serial clock I/O for I2C1 Synchronous serial data I/O for I2C1 Alternate synchronous serial clock I/O for I2C1 Alternate synchronous serial data I/O for I2C1 |
SCL2 SDA2 |
I/O I/O |
ST ST |
No No |
Synchronous serial clock I/O for I2C2 Synchronous serial data I/O for I2C2 |
SCL3 SDA3 |
I/O I/O |
ST ST |
No No |
Synchronous serial clock I/O for I2C3 Synchronous serial data I/O for I2C3 |
TMS TCK TDI TDO |
I I I O |
ST ST ST — |
No No No No |
JTAG Test mode select pin JTAG test clock input pin JTAG test data input pin JTAG test data output pin |
PCI8-PCI18 PWMEA-PWMEF PCI19 - PCI22 PWM1L-PWM4L(2) PWM1H-PWM4H(2) |
I O I O O |
ST — ST — — |
Yes Yes Yes No No |
PWM Inputs 8 through 18 PWM Event Outputs A through F PWM Inputs 19 through 22 PWM Low Outputs 1 through 4 PWM High Outputs 1 through 4 |
CLCINA-CLCIND CLC1OUT-CLC4OUT |
I O |
ST — |
Yes Yes |
CLC Inputs A through D CLC Outputs 1 through 4 |
CMP1 CMP1A-CMP3A CMP1B-CMP3B CMP1C-CMP3C CMP1D-CMP3D |
O I I I I |
— Analog Analog Analog Analog |
Yes No No No No |
Comparator 1 output Comparator Channels 1A through 3A inputs Comparator Channels 1B through 3B inputs Comparator Channels 1C through 3C inputs Comparator Channels 1D through 3D inputs |
DACOUT1 DACOUT2 |
O O |
— — |
No No |
DAC1 output voltage DAC2 output voltage |
IBIAS3, IBIAS2, IBIAS1, IBIAS0/ISRC3, ISRC2, ISRC1, ISRC0 |
O |
Analog |
No |
Constant-Current Outputs 0 through 3 |
OA1IN+ OA1IN- OA1OUT OA2IN+ OA2IN- OA2OUT OA3IN+ OA3IN- OA3OUT |
I I O I I O I I O |
— — — — — — — — — |
No No No No No No No No No |
Op Amp 1+ input Op Amp 1- input Op Amp 1 output Op Amp 2+ input Op Amp 2- input Op Amp 2 output Op Amp 3+ input Op Amp 3- input Op Amp 3 output |
PGD1 PGC1 PGD2 PGC2 PGD3 PGC3 |
I/O I I/O I I/O I |
ST ST ST ST ST ST |
No No No No No No |
Data I/O pin for Programming/Debugging Communication Channel 1 Clock input pin for Programming/Debugging Communication Channel 1 Data I/O pin for Programming/Debugging Communication Channel 2 Clock input pin for Programming/Debugging Communication Channel 2 Data I/O pin for Programming/Debugging Communication Channel 3 Clock input pin for Programming/Debugging Communication Channel 3 |
MCLR(3) | I/P | ST | No | Master Clear (Reset) input. This pin is an active-low Reset to the device. |
AVDD | P | P | No | Positive supply for analog modules. This pin must be connected at all times. |
AVSS | P | P | No | Ground reference for analog modules. This pin must be connected at all times. |
VDD | P | — | No | Positive supply for peripheral logic and I/O pins |
VSS | P | — | No | Ground reference for logic and I/O pins |
Legend: CMOS = CMOS compatible input or output; Analog = Analog input; P = Power; ST = Schmitt Trigger input with CMOS levels; O = Output; I = Input; PPS = Peripheral Pin Select; TTL = TTL input buffer Note:
|