22 Capture/Compare/PWM/Timer Modules (SCCP)

Note: This data sheet summarizes the features of the dsPIC33CK512MPT608 family of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to “Capture/Compare/PWM/Timer (MCCP and SCCP)” (www.microchip.com/DS30003035) in the “dsPIC33/PIC24 Family Reference Manual”.

dsPIC33CK512MPT608 family devices include several Capture/Compare/PWM/Timer base modules, which provide the functionality of three different peripherals from earlier PIC24F devices. The module can operate in one of three major modes:

General Purpose Timer
Input Capture
Output Compare/PWM

Single CCP output modules (SCCPs) provide only one PWM output.

The SCCP module can be operated only in one of the three major modes at any time. The other modes are not available unless the module is reconfigured for the new mode.

A conceptual block diagram for the module is shown in Figure 22-1. All three modes share a time base generator and a common Timer register pair (CCPxTMRH/L); other shared hardware components are added as a particular mode requires.

Each module has a total of six control and status registers:

Each module also includes eight buffer/counter registers that serve as Timer Value registers or data holding buffers:

CCPxTMRH/CCPxTMRL (CCPx Timer High/Low  Counters)
CCPxPRH/CCPxPRL (CCPx Timer Period High/Low)
CCPxRA (CCPx Primary Output Compare Data Buffer)
CCPxRB (CCPx Secondary Output Compare  Data Buffer)
CCPxBUFH/CCPxBUFL (CCPx Input Capture High/Low Buffers)

Figure 22-1. SCCPx Conceptual Block Diagram