8 Interrupt Controller

Note: This data sheet summarizes the features of the dsPIC33CK512MPT608 family of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to “Interrupts” (www.microchip.com/DS70000600) in the “dsPIC33/PIC24 Family Reference Manual”.

The dsPIC33CK512MPT608 family interrupt controller reduces the numerous peripheral interrupt request signals to a single interrupt request signal to the dsPIC33CK512MPT608 family CPU.

The interrupt controller has the following features:

  • Six Processor Exceptions and Software Traps
  • Seven User-Selectable Priority Levels
  • Interrupt Vector Table (IVT) with a Unique Vector for each Interrupt or Exception Source
  • Fixed Priority within a Specified User Priority Level
  • Fixed Interrupt Entry and Return Latencies
  • Alternate Interrupt Vector Table (AIVT) for Debug Support