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Digital Signal Controllers with Secure Subsystem
Digital Signal Controllers with Secure Subsystem
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  2. 6 Secure Subsystem

  • Description
  • Operating Conditions
  • Core: dsPIC33CK CPU
  • Advanced Flash Features
  • Security Features
  • Safety Features
  • Clock Management
  • Power Management
  • High-Resolution PWM with Fine Edge Placement
  • Timers/Output Compare/Input Capture
  • Advanced Analog Features
  • Communication Interfaces
  • Direct Memory Access (DMA)
  • Additional Peripheral Features
  • Debugger Development Support
  • Functional Safety Readiness – ISO 26262/IEC 61508/IEC 60730
  • Qualification Support
  • dsPIC33CK512MPT608 Product Families
  • Pin Diagram
  • To Our Valued Customers
  • Referenced Sources
  • Terminology Cross Reference
  • 1 Device Overview
  • 2 Guidelines for Getting Started with Digital Signal Controllers
  • 3 CPU
  • 4 Memory Organization
  • 5 Flash Program Memory
  • 6 Secure Subsystem
    • 6.1 Overview
    • 6.2 Features
    • 6.3 SPI Clock Configuration
    • 6.4 Applications
  • 7 Resets
  • 8 Interrupt Controller
  • 9 I/O Ports
  • 10 Oscillator with High-Frequency PLL
  • 11 Direct Memory Access (DMA) Controller
  • 12 Controller Area Network Flexible Data-Rate (CAN FD) Modules
  • 13 High-Resolution PWM with Fine Edge Placement
  • 14 High-Speed, 12-Bit Analog-to-Digital Converter
  • 15 High-Speed Analog Comparator with Slope Compensation DAC
  • 16 Quadrature Encoder Interface (QEI)
  • 17 Universal Asynchronous Receiver Transmitter (UART)
  • 18 Serial Peripheral Interface (SPI)
  • 19 Inter-Integrated Circuit (I2C)
  • 20 Single-Edge Nibble Transmission (SENT)
  • 21 Timer1
  • 22 Capture/Compare/PWM/Timer Modules (SCCP)
  • 23 Configurable Logic Cell (CLC)
  • 24 Peripheral Trigger Generator (PTG)
  • 25 32-Bit Programmable Cyclic Redundancy Check (CRC) Generator
  • 26 Current Bias Generator (CBG)
  • 27 Operational Amplifier
  • 28 Deadman Timer (DMT)
  • 29 Power-Saving Features
  • 30 Special Features
  • 31 Instruction Set Summary
  • 32 Development Support
  • 33 Electrical Characteristics
  • 34 Packaging Information
  • 35 Revision History
  • The Microchip Website
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  • Customer Support
  • Product Identification System
  • Microchip Devices Code Protection Feature
  • Legal Notice
  • Trademarks
  • Quality Management System
  • Worldwide Sales and Service

6 Secure Subsystem

The information available in this section is only a summary of the Secure Subsystem. For a detailed reference manual, which is under NDA, contact your local Microchip sales office or obtain additional support at www.microchip.com/en-us/support/design-help/client-support-services

The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.

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