3.4.3.2.1.7 DMCDA – Demodulator Carrier Detect for Path A

The DMCDA register contains the settings for the carrier detection of path A. The number of checked samples (DMCDA.DMCTA) and the maximum number of allowed errors (DMCDA.DMCLA) within this time window can be configured. This register must only be modified if the block receiving the settings is disabled (RDPR.PRPTA = 1). Modifying the settings during operation may lead to unstable operation.

Name:	DMCDA
Offset:	0x0A4
Reset:	0x00


Bit	7	6	5	4	3	2	1	0
	DMCTA[2:0]			DMCLA[4:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 7:5 – DMCTA[2:0] Demodulator Carrier Detect Time for Path A

This setting defines the time window for carrier detection as a number of checked samples. A counter accumulates the carrier errors for the number of samples defined in this register. The counter is reset after this period for the next check cycle. Selecting DMCTA = 0 turns the carrier check on path A off. The recommendation is to select a DMCTA value covering two symbols (one Manchester bit).

Calculation of the number of samples to span over two symbols

S A M P L E S_2 S Y N A = 2 \times \frac{C L K_B B}{S y m b o l R a t e P a t h A} ......(28)

Equation parameters:
- CLK_BB: Baseband clock frequency in Hz. See equation (13) in the section Bandwidth Scaling

Choose a number of samples greater or equal to SAMPLES_2SYNA from the following table. The corresponding carrier detect time DMCTA[2:0] value is the preferred setting.

S A M P L E S_C T A \geq S A M P L E S_2 S Y N A ......(29)

Table 3-20. Number of Samples for Carrier Detect Time versus DMCTA Setting
SAMPLES_CTA	DMCTA
Carrier Detect OFF	0
16	1
32	2
64	3
128	4
256	5
512	6
1024	7

Bits 4:0 – DMCLA[4:0] Demodulator Carrier Detect Limit for Path A

Sets the number of allowed carrier errors within the time window defined by DMCTA. The recommended value for this limit is 20% of the samples within the carrier detect time window (see SAMPLES_CTA value above). Smaller values, for example, 10%, lead to more rigorous checking, and, thus, to more rapid error detection. More rigorous checking may cause reduced sensitivity.

Calculation procedure example:

Select the number of allowed errors within the carrier detect time window (20%).
$A l l o w e d C a r r i e r C h e c k E r r o r s = \frac{S A M P L E S_C T A}{5} ......(30)$

Equation parameters:
- SAMPLES_CTB: Number of samples for carrier check. See Table 3-20

Calculate the register setting
$D M C L A = r o u n d (\frac{A l l o w e d C a r r i e r C h e c k E r r o r s}{4}) .......(31)$