3.4.3.2.1.9 DMMA – Demodulator Mode for Path A

This register selects the main operating modes of the demodulator and the data filter. It must only be modified if the block receiving the settings is disabled (RDPR.PRPTA = 1). Modifying the settings during operation may lead to unstable operation.

Name: DMMA
Offset: 0x0A2
Reset: 0x00

Bit 76543210 
 DMNEADMHADMPADMATA[4:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bit 7 – DMNEA Demodulator NRZ Enable for Path A

Enables NRZ reception on data path A.
Table 3-24. DMNEA Bit Details
Bit 7Description
0Matched Manchester filter is used for data reception and TMDO output.
1Symbol-based (NRZ) filter is used for data reception and TMDO output. Microchip recommends activating hold mode (DMHA = 1) and setting a reasonable amplitude threshold (DMATA) because this is used for noise suppression in the DC removal loop.

Bit 6 – DMHA Demodulator Hold Mode for Path A

This register activates the freezing of the DC compensation if no signal transitions are detected.
Table 3-22. DMHA Bit Details
Bit 6Description
0Hold mode deactivated – To be used for telegrams with up to two identical consecutive symbols. Adapts well to changing signal conditions. Not suitable for longer consecutive high or low symbol sequences because the DC threshold fades over time.
1Hold mode activated – To be used for NRZ or other reception with up to eight identical symbols in sequence. This mode freezes the DC compensation loop after a symbol change until the next signal edge is detected.

Bit 5 – DMPA Demodulator Received Data Polarity Selection for Path A

This register selects the data polarity at TMDO and the RX buffer for path A. There is no effect on TRPA.
Table 3-23. DMPA Bit Details
Bit 5Description
0

For Manchester coding: Rising edge in the middle of a bit is considered a ‘1’.

For NRZ coding: Higher frequency (FSK) and active carrier (ASK) is considered a ‘1’.

1

For Manchester coding: Falling edge in the middle of a bit is considered a ‘1’.

For NRZ coding: Lower frequency (FSK) and no carrier (ASK) is considered a ‘1’.

Bits 4:0 – DMATA[4:0] Demodulator Amplitude Threshold for Path A

Sets a minimum required modulation amplitude for the modulation amplitude check. An EOTS.AMPFA error is flagged if the selected modulation threshold is not exceeded by the incoming signal within two symbols (during WOK check if SY1TA is set) or within three symbols under all other circumstances. This check can also be used as an additional start of a telegram condition (SOTSA.AMPOA). It is set to ‘1’ if no error occurred during the symbol check time. The recommended threshold is calculated differently for ASK and FSK modulation.

Recommended DMATA Setting for FSK

The maximum useful amplitude threshold for a given FSK signal depends on the expected deviation and the data rate settings:

DMATA_MAX_FSK=round(MIN_DEVIATION_A×ATSCAL_A×MAVFL_A×10CLK_BB×PLL_GAIN_A).......(36)
  • Equation parameters:
    • MIN_DEVIATION_A: The lowest possible frequency deviation in Hz of the useful signal on path A
    • ATSCAL_A: Amplitude threshold scaling on path A. See Table 3-15
    • MAVFL_A: Moving average filter length on path A. See Table 3-14
    • CLK_BB: Baseband clock frequency in Hz. See equation (13) in the section Bandwidth Scaling
    • PLL_GAIN_A: FSK PLL gain on path A. See Table 3-18

    Using a higher value results in very frequent or a continuous error indication because the modulation amplitude threshold is similar or higher than the minimum deviation (MIN_DEVIATION_A) of the useful signal.

    The recommended setting for DMATA is half of the calculated maximum value (DMATA_MAX_FSK),

    DMATA=round(DMATA_MAX_FSK2)......(37)
    raising this value increases the severity of this check.

    Recommended DMATA Setting for ASK

    DMATA=round(3×ATSCAL_A×MAVFL_A2DMDNA2)......(38)

  • Equation parameters:
    • ATSCAL_A: Amplitude threshold scaling on path A. See Table 3-15
    • MAVFL_A: Moving average filter length on path A. See Table 3-14
    • DMDNA: Down-sampling on path A. See Table 3-15