47.6 Peripheral Active Current

Table 47-7. Peripheral Active Current Electrical Specifications (1)
DC CHARACTERISTICS Standard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +125°C for Extended Temp

Param. No.SymbolCharacteristicsConditions
MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 310 µA
PAI_78IXOSC_4MHZ_AMPGC_OFFXOSC current (4 of 10)F = 4 MHz - CL = 20 pF

XOSC.GAIN = 1,

AMPGC = OFF,

AVDD = VDDIO = 5.0V

PAI_74IACAC Active currentCOMP0 and COMP1 operating in low speed,

Vscaler0 = Vscaler1 = AVDD

PAI_80IPDECPDEC Active currentCounter Mode
MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 400 µA
PAI_90IXOSC_8MHZ_AMPGC_ONXOSC current (5 of 10)F = 4 MHz - CL = 20 pF

XOSC.GAIN = 1,

AMPGC = ON,

AVDD = VDDIO = 5.0V

PAI_93ITCC2TCC Active Current (1 of 2)Normal Frequency mode
MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 500 µA
PAI_110IXOSC_8MHZ_AMPGC_OFFXOSC current (6 of 10)F = 8 MHz - CL = 20 pF

XOSC.GAIN = 2,

AMPGC = OFF,

AVDD = VDDIO = 5.0V

MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 550 µA
PAI_50IOSC48MOSC48M currentAVDD = VDDIO = 5.0V
MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 600 µA
PAI_120IDAC (2)DAC Active currentVREF = AVDD,

DAC DATA = 0x3 FF

MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 760 µA
PAI_140IPTCPTC Active currentFree-Running Mode
MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 850 µA
PAI_133IXOSC_16MHZ_AMPGC_ONXOSC current (7 of 10)F = 16 MHz - CL = 20 pF

XOSC.GAIN = 3,

AMPGC = ON,

AVDD = VDDIO = 5.0V

MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 950 µA
PAI_150IXOSC_16MHZ_AMPGC_OFFXOSC current (8 of 10)F = 16 MHz - CL = 20 pF

XOSC.GAIN = 3,

AMPGC = OFF,

AVDD = VDDIO = 5.0V

MODULES/PERIPHERALS ACTIVE CURRENTS ≤ 1.1 mA
PAI_160IDPLL96MDPLL Current (2 of 2)Fout = 96 MHz,

AVDD = VDDIO = 5.0V

Note:
  1. Conditions:
    • Only mentioned peripheral modules is operating (i.e., rest of the peripherals are inactive)
    • MCLK all APB clock masked except MCLK and NVMCTRL and selected peripheral
    • MCLK.AHBMASK = 0x00C00FFF
    • All clock generation sources disabled unless otherwise specified. (i.e., XOSC32K = Off)
    • All clock sources disabled except XOSC32K running with external 32 kHz crystal and FDPLL96M using XOSC32K as reference and running at 96 MHz divided by 2 on GCLK0
    • GCLK clock generators 1 to 8 stopped (GENCTRL[8:1].GENEN = 0)
    • AHB/APB clocks not needed are masked: AHBMASK = 0x70, APB(A/B/C/D)MASK = 0x0
    • CPU and AHB clocks undivided
    • I/Os are inactive input mode with input trigger disabled
    • WDT, RTC, CFD Clock Fail Detect disabled
    • RESET = VDDIO
    • CPU is running on Flash with three Wait States
    • NVMCTRL cache enabled
    • BODVDD disabled
    • Measure is differential between active and inactive module in those conditions
  2. Conditions:
    • Same Conditions as Note 1
    • GCLK1 running on FDPLL96M at 96 MHz divided by 96
    • Measure is differential between active and inactive module in those conditions