4.17.18.37 PMC Generic Clock Status Register 3

The following configuration values are valid for all listed bit names of this register:

0: The corresponding generic clock is disabled.

1: The corresponding generic clock is enabled.

Name: PMC_GCSR3
Offset: 0x00CC
Reset: 0x00000000
Property: Read-only

“PIDx” refers to identifiers as defined in the section “Peripheral Identifiers”.

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
       GPID105  
Access R 
Reset 0 
Bit 76543210 
 GPID103        
Access R 
Reset 0 

Bit 9 – GPIDx Generic Clock x Status

Bit 7 – GPIDx Generic Clock x Status