4.17.18.21 PMC Fast Start-Up Mode Register
This register can only be written if the WPEN bit is cleared in the PMC Write Protection Mode Register.
| Name: | PMC_FSMR |
| Offset: | 0x0070 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| WLAN1 | WLAN0 | ||||||||
| Access | R/W | R/W | |||||||
| Reset | 0 | 0 |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| LPM | HSDHC | USBAL | RTCAL | RTTAL | |||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| Access | |||||||||
| Reset |
Bits 24, 25 – WLANx Wake-Up on LAN[x] Enable
| Value | Description |
|---|---|
| 0 | The Wake-up on LAN[x] alarm has no effect on the PMC. |
| 1 | The Wake-up on LAN[x] alarm enables a fast restart signal to the PMC. |
Bit 20 – LPM Low-Power Mode
| Value | Description |
|---|---|
| 0 | When the processor WaitForEvent (WFE) instruction is applied, the processor enters Sleep mode. |
| 1 | When the processor WaitForEvent (WFE) instruction is applied, the system enters ULP1 mode. |
Bit 19 – HSDHC HSDHC Alarm Enable
| Value | Description |
|---|---|
| 0 | The HSDHC alarm has no effect on the PMC. |
| 1 | The HSDHC alarm enables a fast restart signal to the PMC. |
Bit 18 – USBAL USB Alarm Enable
| Value | Description |
|---|---|
| 0 | The USB alarm has no effect on the PMC. |
| 1 | The USB alarm enables a fast restart signal to the PMC. |
Bit 17 – RTCAL RTC Alarm Enable
| Value | Description |
|---|---|
| 0 | The RTC alarm has no effect on the PMC. |
| 1 | The RTC alarm enables a fast restart signal to the PMC. |
Bit 16 – RTTAL RTT Alarm Enable
| Value | Description |
|---|---|
| 0 | The RTT alarm has no effect on the PMC. |
| 1 | The RTT alarm enables a fast restart signal to the PMC. |