4.17.18.36 PMC Generic Clock Status Register 2

The following configuration values are valid for all listed bit names of this register:

0: The corresponding generic clock is disabled.

1: The corresponding generic clock is enabled.

Name: PMC_GCSR2
Offset: 0x00C8
Reset: 0x00000000
Property: Read-only

“PIDx” refers to identifiers as defined in the table “Peripheral Identifiers”.

Bit 3130292827262524 
      GPID90GPID89  
Access RR 
Reset 00 
Bit 2322212019181716 
  GPID86  GPID83  GPID80 
Access RRR 
Reset 000 
Bit 15141312111098 
 GPID79 GPID77GPID76GPID75GPID74GPID73  
Access RRRRRR 
Reset 000000 
Bit 76543210 
 GPID71GPID70GPID69GPID68GPID67GPID66GPID65GPID64 
Access RRRRRRRR 
Reset 00000000 

Bits 25, 26 – GPIDx Generic Clock x Status

Bit 22 – GPIDx Generic Clock x Status

Bit 19 – GPIDx Generic Clock x Status

Bits 15, 16 – GPIDx Generic Clock x Status

Bits 9, 10, 11, 12, 13 – GPIDx Generic Clock x Status

Bits 0, 1, 2, 3, 4, 5, 6, 7 – GPIDx Generic Clock x Status