12.6.36 PWM Generator x Dead-Time Register Low
Note:
- DTL[13:11] bits are not available
when HREN (PGxCONL[7]) =
0.
| Name: | PGxDTL |
| Offset: | 0x35A, 0x390, 0x3C6, 0x3FC, 0x432, 0x468, 0x49E, 0x4D4 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| DTL[13:8] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DTL[7:0] | |||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |