32.15 Analog-to-Digital Converter (ADC) Electrical Specifications

Table 32-17. ADC AC Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO=AVDD=VDD 2.7V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
Device Supply
ADC_1	AVDD	ADC Module Supply	AVDD(min)		AVDD(max)	V	VDDIOx = AVDD
Reference Inputs
ADC_3	VREF⁽¹⁾	ADC Reference Voltage	Spec VR_1 to VR_3			V	VREF = INT1V (CTRL.REFSEL = 0x0)
			0.99*(AVDD / 1.48)	AVDD / 1.48	1.01*(AVDD / 1.48)	V	VREF = INTVCC0 (REFCTRL.REFSEL = 0x1)
			0.99*(AVDD / 2)	AVDD / 2	1.01*(AVDD / 2)	V	VREF = INTVCC1 (REFCTRL.REFSEL = 0x2) only for AVDD >2.0V
			2.4	—	AVDD-0.6V	V	AVDD ≥ VREF + 0.6V VREF = VREFA pin (REFCTRL.REFSEL = 0x3) VREF = VREFB pin (REFCTRL.REFSEL = 0x4)
Analog Input Range
ADC_7	AFS	Full-Scale Analog Input Signal Range	0	—	VREF/Gain	V	Single-Ended Mode
ADC_9	AFS	Full-Scale Analog Input Signal Range	-VREF/Gain	—	VREF/Gain	V	Differential Mode
ADC_10	VCMIN	Input common mode voltage	0	—	0.7*AVDD + VREF/4 - 0.75	V	Single-Ended Mode
			VREF/4 - 0.05*AVDD -0.1	—	0.95*AVDD + VREF/4 - 0.75	V	Differential Mode if abs(VIN) > VREF / 4
			0.2*AVDD – 0.1	—	1.2*AVDD - 0.75	V	Differential Mode if abs(VIN) < VREF / 4
ADC_11	TSETTLING	ADC Stabilization Time	—	10	—	µs	CTRLA.ENABLE = 1
Note: ADC functional device operation with either internal or external VREF<2.4V is functional, but not characterized. ADC will function, but with degraded accuracy of approximately ~((0.06 * 2n) / VREF) LSB’s over full scale range, where "n"=#bits. ADC accuracy is limited by internal VREF accuracy + drift, MCU generated noise plus users application noise/accuracy on AVDD, AGND.

Table 32-18. ADC Single-Ended Mode AC Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO=AVDD=VDD 2.7V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
SINGLE ENDED MODE ADC Accuracy^{(4, 5)}
SADC_11	Res	Resolution	8	—	12	bits	Selectable 8, 10, 12 bit Resolution Ranges
SADC_13	ENOB^{(1, 2)}	Effective Number of bits	8.9	9.8	—	bits	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SADC_19	INL	Integral Nonlinearity	-3	—	3	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SADC_25	DNL	Differential Nonlinearity	-0.9	—	1	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SADC_31	GERR	Gain Error	-9	—	7	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SADC_37	EOFF	Offset Error	-30	—	30	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SADC_43	TUE	Total Unadjusted Error	1.6	—	25.2	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SINGLE ENDED MODE ADC Dynamic Performance ^(1,2,4,5)
SADC_49	SINAD	Signal to Noise and Distortion	55.5	—	—	dB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SADC_51	SNR	Signal to Noise ratio	58	—	—		REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SADC_53	SFDR	Spurious Free Dynamic Range	70	—	—		REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
SADC_55	THD ⁽³⁾	Total Harmonic Distortion	—	—	-59.2		REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
Note: Characterized with an analog input sine wave = 40kHz sine wave. Sine wave peak amplitude = 95% ADC_ Full Scale amplitude input with 12bit resolution. Value taken over 7 harmonics. ADC is configured in 12bits mode, All registers are at the reset default value unless otherwise stated. The ADC channels are powered from AVDD except channels on pins PA08, PA09, PA10, PA11 which are powered from VDDIO. The ADC specifications are only applicable to the channels powered from AVDD. Performances of the channels powered from VDDIO are dependent on the activity of the system and therefore application dependent.

Table 32-19. ADC Differential Mode AC Electrical Specifications
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO=AVDD=VDD 2.7V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
DIFFERENTIAL MODE ADC Accuracy^{(4, 5)}
DADC_11	Res	Resolution	8	—	12	bits	Selectable 8, 10, 12 bit Resolution Ranges
DADC_13	ENOB ^{(1, 2)}	Effective Number of bits	10	10.7	—	bits	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DADC_19	INL	Integral Nonlinearity	-1.7	—	1.7	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DADC_25	DNL	Differential Nonlinearity	-0.8	—	0.8	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DADC_31	GERR	Gain Error	-10	—	4	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DADC_37	EOFF	Offset Error	-14	—	14	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DADC_43	TUE	Total Unadjusted Error	0.8	—	13.8	LSB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DIFFERENTIAL MODE ADC Dynamic Performance ^(1,2,4,5)
DADC_49	SINAD	Signal to Noise and Distortion	62	—	—	dB	REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DADC_51	SNR	Signal to Noise ratio	64.5	—	—		REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DADC_53	SFDR	Spurious Free Dynamic Range	79	—	—		REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
DADC_55	THD ⁽³⁾	Total Harmonic Distortion	—	—	-64.4		REFCTRL.REFSEL= 0x3 or 0x4 VREFA or VREFB >= 2.4V REFCTRL.REFCOMP=0x1
Note: Characterized with an analog input sine wave = 40kHz sine wave. Sine wave peak amplitude = 95% ADC_ Full Scale amplitude input with 12bit resolution. Value taken over 7 harmonics. ADC is configured in 12bits mode, All registers are at the reset default value unless otherwise stated. The ADC channels are powered from AVDD except channels on pins PA08, PA09, PA10, PA11 which are powered from VDDIO. The ADC specifications are only applicable to the channels powered from AVDD. Performances of the channels powered from VDDIO are dependent onto the activity of the system and thus application dependent.

Table 32-20. ADC Conversion and Sample AC Electrical Requirements
AC CHARACTERISTICS			Standard Operating Conditions: VDDIO=AVDD=VDD 2.7V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
ADC Clock Requirements
ADC_57	TAD	ADC Clock Period	476.2	—	8333.3	ns	—
ADC_58	fGCLK_ADCx	ADCx Module GCLK max input freq	—	—	FCLK_51	MHz	—
ADC Single-Ended Throughput Rates
ADC_59	FTP ⁽¹⁾ (Single-Ended Mode)	Throughput Rate (Single-Ended)	—	—	300	KSPS	12-bit resolution, Rsource ≤ 8,750 Ω, SAMPCTRL.SAMPLEN = 0 () CTRLB.FREERUN = 0x1 INPUTCTRL.GAIN=0x0
			—	—	300		12 -bit resolution, Rsource ≤ 8,750 Ω, SAMPCTRL.SAMPLEN = 0 () CTRLB.FREERUN = 0x0 INPUTCTRL.GAIN=0x0
			—	—	262.5		12 -bit resolution, Rsource ≤ 8,750 Ω, SAMPCTRL.SAMPLEN = 0 () CTRLB.FREERUN = 0x0 INPUTCTRL.GAIN=0x1,0x2 or 0xF
			—	—	233.3		12 -bit resolution, Rsource ≤ 8,750 Ω, SAMPCTRL.SAMPLEN = 0 () CTRLB.FREERUN = 0x0 INPUTCTRL.GAIN=0x3 or 0x4
ADC Differential Mode Throughput Rates
ADC_61	FTP ⁽¹⁾ (Differential Mode)	Throughput Rate (Differential Mode)	—	—	350	KSPS	12-bit resolution, Rsource ≤ 8,750 Ω, SAMPCTRL.SAMPLEN = 0 () CTRLB.FREERUN = 0x1 INPUTCTRL.GAIN=0x0
			—	—	300		12 -bit resolution, Rsource ≤ 8,750 Ω, SAMPCTRL.SAMPLEN = 0 () CTRLB.FREERUN = 0x0 INPUTCTRL.GAIN=0x0, 0x1 or 0xF
			—	—	262.5		12 -bit resolution, Rsource ≤ 8,750 Ω, SAMPCTRL.SAMPLEN = 0 () CTRLB.FREERUN = 0x0 INPUTCTRL.GAIN=0x2 or 0x3
			—	—	233.3		12 -bit resolution, Rsource ≤ 8,750 Ω, SAMPCTRL.SAMPLEN = 0 () CTRLB.FREERUN = 0x0 INPUTCTRL.GAIN=0x4
ADC Conversion and Sample time
ADC_63	TSAMP⁽²⁾	ADC Sample Time	1	—	—	TAD	12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 8,750 Ω
			2	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 21,000 Ω
			3	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 33,300 Ω
			4	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 45,550 Ω
			5	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 57,800 Ω
			6	—	—		12-bit resolution, TAD(min), Ext Analog Input Rsource ≤ 70,100 Ω
			10	—	—	µs	With temperature sensor as input - INPUTCTRL.MUXPOS=0x18
			10	—	—		With bandgap as input - INPUTCTRL.MUXPOS=0x19
			0.25				with SCALEDCOREVCC or SCALEDIOVCC as input - INPUTCTRL.MUXPOS=0x1A ot 0x1B
			3				With DAC as input - INPUTCTRL.MUXPOS=0x1C
ADC_65	TCNV⁽¹⁾	Conversion Time (Single-Ended Mode)	7			TAD	12-bit resolution - INPUTCTRL.GAIN=0x0 (Gain 1x)
			8				12-bit resolution - INPUTCTRL.GAIN=0x1, 0x2 or 0xF (Gain 0.5x, 2x, 4x)
			9				12-bit resolution - INPUTCTRL.GAIN=0x3 or 0x4 (Gain 8x, 16x)
ADC_67		Conversion Time (Differential Mode)	6			TAD	12-bit resolution - INPUTCTRL.GAIN=0x0 (Gain 1x)
			7				12-bit resolution - INPUTCTRL.GAIN=0x1, 0x2 or 0xF (Gain 0.5x, 2x, 4x)
			8				12-bit resolution - INPUTCTRL.GAIN=0x3 or 0x4 (Gain 8x, 16x)
ADC_69	CSAMPLE	ADC Internal Sample Cap	—	3.5	4	pF	—
ADC_71	RSAMPLE	ADC Internal impedance	—	—	3500	Ω	—
Note: ADC Throughput Rate FTP = ((1 / ((TSAMP + TCNV) * TAD)) / (# of user active analog inputs in use on specific target ADC module)). Refer to Table 27-2. Delay Gain for more details. Note: Specification values assume only one AINx channel in use. TSAMP = (((RSAMPLE + RSOURCE) * CSAMPLE * 9.7) / TAD)+1 rounded down to nearest whole integer. User SAMPCTRL.SAMPLEN = (2*TSAMP - 1).

Performance with the Averaging Digital Feature

Averaging is a feature which increases the sample accuracy. ADC automatically computes an average value of multiple consecutive conversions. The numbers of samples to be averaged is specified by the Number-of-Samples-to-be-Collected bit group in the Average Control register (AVGCTRL.SAMPLENUM[3:0]) and the averaged output is available in the Result register (RESULT).

Table 32-21. Averaging Feature
Average Number	Conditions	SNR(dB)	SINAD (dB)	SFDR (dB)	ENOB (bits)
1	In Differential mode, 1x gain, AVDD = 3.0V, VREF = 2.4V, 350 ksps T = 25°C	66	65	85	10.5
8		68	66	87	11.4
32		70	67	88	11.6
128		71	67	88	11.7

Performance with the Hardware Offset and Gain Correction

Inherent gain and offset errors affect the absolute accuracy of the ADC. The offset error cancellation is handled by the Offset Correction register (OFFSETCORR) and the gain error cancellation, by the Gain Correction register (GAINCORR). The offset and gain correction value is subtracted from the converted data before writing the Result register (RESULT).

Table 32-22. Offset and Gain Correction Features
Gain Factor	Conditions	Offset Error (mV)	Gain Error (mV)	Total Unadjusted Error (LSB)
0.5x INPUTCTRL.GAIN = 0xF	In Differential mode, AVDD = 3.0V, VREF = 2.4V, 350 ksps T = 25°C	0.25	1	2.4
1x INPUTCTRL.GAIN = 0x0		0.2	0.1	1.5
2x INPUTCTRL.GAIN = 0x1		0.15	-0.15	2.7
8x INPUTCTRL.GAIN = 0x3		-0.05	0.05	3.2
16x INPUTCTRL.GAIN = 0x4		0.1	-0.05	6.1

Inputs and Sample and Hold Acquisition Times

The analog voltage source must be able to charge the Sample-and-Hold (S/H) capacitor in the ADC to achieve maximum accuracy. Seen externally the ADC input consists of a resistor (RSAMPLE) and a capacitor (CSAMPLE). In addition, the source resistance (RSOURCE) must be considered when calculating the required S/H time. The following figure shows the ADC input channel equivalent circuit.

Figure 32-1. ADC Input