32.2 General Operating Ratings and Thermal Conditions

Table 32-2. Operating Frequency vs. Voltage
Param. No.	VDDIO, VDDIN, AVDD Range	Temp. Range (in °C)	Max MCU Frequency	Comments
DC_7	2.7 to 3.63V⁽¹⁾	-40°C to +125°C	32 MHz	Extended
Note: With BOD33 disabled. If the BOD33 is enabled, refer to the REG_47 parameter.

Table 32-3. MCU Thermal Operating Conditions
Rating	Symbol	Min.	Typ.	Max.	Unit
Extended Temperature Range Operating Ambient Temperature Range Operating Junction Temperature Range	TA TJ	-40 —	—	125 145	°C °C
Power Dissipation: Internal Chip Power Dissipation: PINT = (VDDIO x (IDD –∑ IOHVDDIO)) + (VDDCORE x IDDCORE) + + (AVDD x (IDDANA - ∑ IOHAVDD)) + (VDDREG x IDDREG) I/O Pin Power Dissipation: PI/O = ∑ ((VDDIO – VOHVDDIO) x IOHVDDIO) + ∑ (VOL x IOLVDDIO) + ∑ ((AVDD – VOHAVDD) x IOHAVDD) + ∑ (VOL x IOLAVDD)	PD	PINT + PI/O			W
Maximum Allowed Power Dissipation	PDMAX	(TJ – TA)/θJA			W

Table 32-4. Thermal Packaging Characteristics⁽¹⁾
Characteristics	Symbol	Typ.	Max.	Unit
Thermal Resistance, 32-pin TQFP (7x7x1 mm) Package	θJA	63.1	—	°C/W
Thermal Resistance, 48-pin TQFP (7x7x1 mm) Package	θJA	62.7	—	°C/W
Thermal Resistance, 64-pin TQFP (10x10x1 mm) Package	θJA	56.3	—	°C/W
Thermal Resistance, 32-pin VQFN (5x5x1 mm) Package	θJA	40.9	—	°C/W
Thermal Resistance, 48-pin VQFN (7x7x0.9 mm) Package	θJA	30.9	—	°C/W
Thermal Resistance, 64-pin VQFN (9x9x1 mm) Package	θJA	31.4	—	°C/W
Note: Junction to ambient thermal resistance, Theta-JA (θJA) numbers are achieved by package simulations.