3.6.2.4.6 SOC_AXI_INITIATOR

This is an SoC integration parameter to allow integrating HLS-generated modules into a custom user-defined SmartDesign system. The parameter specifies the AXI initiator interface used by the processor in the user-defined SmartDesign system to connect to the HLS module's AXI target interface. This AXI initiator interface is used by the processor to control and transfer data to/from the HLS modules.

Please refer to Soc Integration Parameters in User-defined SmartDesign for more details on using this Tcl parameter.

Category
HLS Constraints
Value Type
String
Default Value (Based on Icicle SoC reference design)
AXI2AXI_TO_HLS:AXI4_MASTER
Dependencies
None
Applicable Flows
SoC Flow Only
Test Status
Actively in-use
Examples
set_parameter SOC_AXI_INITIATOR AXI2AXI_TO_HLS:AXI4_MASTER