24.5.3 Control C
| Name: | CTRLC |
| Offset: | 0x02 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMD[2:0] | |||||||||
| Access | R/W | R/W | R/W | ||||||
| Reset | 0 | 0 | 0 | ||||||
Bits 2:0 – CMD[2:0] Command
This bit field is used to give software commands.
Note:
All commands last for a single cycle unless software continuously triggers them. The register is always read as zero.
FAULTCLR will clear the FDSTATE bit in the Status (WEXn.STATUS) register if no Fault condition is present.
BLANKCLR will clear the BLANKSTATE in the WEXn.STATUS register if no hardware blanking is active.
| Value | Name | Description |
|---|---|---|
| 0x0 | NONE | No Command |
| 0x1 | UPDATE | Force update of Dead-Time, SWAP and PGM buffer registers |
| 0x2 | FAULTSET | Set fault detection |
| 0x3 | FAULTCLR | Clear fault detection |
| 0x4 | BLANKSET | Set SW blanking |
| 0x5 | BLANKCLR | Clear SW blanking |
| 0x6 | - | Reserved |
| 0x7 | - | Reserved |