37.13.12 ADCCMPEN2 – ADC Digital Comparator 2 Enable Register

These registers select which analog input conversion result is processed by the digital comparator.

Name:	ADCCMPEN2
Offset:	0x100
Reset:	0x00000000
Property:	-


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
		CMPEx22	CMPEx21	CMPEx20	CMPEx19	CMPEx18	CMPEx17	CMPEx16
Access		R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset		0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	CMPEx15	CMPEx14	CMPEx13	CMPEx12	CMPEx11	CMPEx10	CMPEx9	CMPEx8
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	CMPEx7	CMPEx6	CMPEx5	CMPEx4	CMPEx3	CMPEx2	CMPEx1	CMPEx0
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 – CMPEx ADC Digital Comparator x Enable bits

Note: CMPEx = where x stands for the bit value from 0 to 22

These bits enable conversion results corresponding to the analog input to be processed by the digital comparator. CMPE0 enables AN0, CMPE1 enables AN1 and so on.

Note:

CMPEx = ANx, where x = 0-22 (Digital Comparator inputs are limited to AN0 through AN22)
Changing the bits in this register while the Digital Comparator is enabled (ENDCMP = 1) can result in unpredictable behavior.