30.5.4 Interrupt Flags
| Name: | INTFLAGS |
| Offset: | 0x03 |
| Reset: | 0x00 |
| Property: | Configuration Change Protection
(when enabled by CCP bit or LOCK bit in the CTRLA register) |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | BADPC | BADC | UC | EXP | ERROR | | PRECLEAR | CLEAR | |
| Access | R | R | R | R | R/W | | R | R | |
| Reset | 0 | 0 | 0 | 0 | 0 | | 0 | 0 | |
Bit 7 – BADPC Non-PRECLEAR
command received while expecting PRECLEAR
Set if a command
other than PRECLEAR was received while the PRECLEAR bit in the INTFLAGS register is
set. Cleared by writing a ‘1’ to the ERROR
bit.
Bit 6 – BADC Non-CLEAR command
received while expecting CLEAR
Set if a successful PRECLEAR
has been received earlier, and a command other than CLEAR is received. Cleared by
writing a ‘1’ to the ERROR bit.
Bit 5 – UC Unexpected
Command
Set if a successful PRECLEAR
has been received earlier, and a subsequent CLEAR is received before the window has
become open. Cleared by writing a ‘1’ to the ERROR bit.
Bit 4 – EXP Counter has expired
Set if the counter has
expired. Cleared by writing a ‘1’ to the ERROR
bit.
Bit 3 – ERROR SWDT Error has occurred
This bit is set when BADPC,
BADC, UC or EXP are set. It is cleared by writing a ‘1’ to it. The
BADPC, BADC, UC and EXP flags will be cleared in the same operation that clears
ERROR.
Bit 1 – PRECLEAR PRECLEAR can be received
This flag is set when a
PRECLEAR command can be received.
Bit 0 – CLEAR CLEAR can be received
This bit is set when a CLEAR
command can be received.
