30.5.6 Reset Value

Name:	RESET
Offset:	0x08
Reset:	0x00
Property:	Configuration Change Protection (when enabled by CCP bit in the CTRLA register)


Bit	31	30	29	28	27	26	25	24
	RESET[31:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	RESET[31:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	RESET[31:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	RESET[31:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	0	0	0	0	0	0	0	0

Bits 31:0 – RESET[31:0] SWDT Reset Value

The RESET register represents the 24-bit reset value as a 32-bit quantity (with the upper byte fixed at zero) for straightforward use with 32-bit data types.

This register is writable only when the LOCK bit in the CTRLA register is ‘0’.